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The Silicom Denmark fbC2CGg3 is a powerful half length accelerator card featuring two QSFP28 slots, providing network connectivity and high speed capture to host memory with zero packet loss and packet processing. The 2xQSFP28 slots support configurations with data rates of 8x10GE, 2x40GE, 8x25GE or 2x100GE, while supporting a bandwidth to host system of over 200 Gbps. Dedicated firmwares are offered for each link speed.
The fbC2CGg3 is mounted with the latest Ultrascale Xilinx FPGA technology, providing packet filtering, advanced processing, traffic management, load balancing and host offloading mechanisms, to a wide range of applications. In addition to this, Tx capabilities are also supported for traffic redirection and selective bypass.
The card is a single-slot PCIe solution for a 16-lane PCIe slot, and features an optional 2nd 16-lane PCIe connector for connecting to a 2nd PCIe slot. The 16-lane connections are via 2×8 lanes using bifurcation. With its two PCIe connectors, the card can offer traffic load balancing and application acceleration optimized for NUMA environments, bypassing the QPI bridge.
This card is also available as a cost optimized variant for 10GE and 40GE.
Network I/F
Supported media
External bus
Onboard memory
Performance
Delay
Timestamp
Time synchronization
FPGA firmware
Hardware specification
Hardware monitor function
SOFTWARE API
SERVER LOAD BALANCING
NETWORK CONNECTIVITY
PERFORMANCE
FILTERS
Comprehensive hardware filter function that can be defined / integrated in real time (various functions such as range filter, pattern filter, match filter, True or False are also provided)
PACKET SLICING
Comprehensive packet slicing function to save memory and storage capacity
PACKET DESCRIPTOR
Give the following packet header on the adapter
PACKET PROCESSING
It is possible to parse and normalize all common protocols including GTP Layer 2-5. With each field, the dynamic offset function allows the host application to directly access the relevant fields without having to process the protocol stack. Reduce the use of host resources and speed up applications.
DE-DUPLICATION
Delete duplicate packets on the adapter. Reduce unnecessary processing on the host, enabling faster applications.
IP DEFRAGMENTATION
Fragmented IP packet reconfigured on adapter. Reduced consumption consumption of host CPU.
NETWORK STATISTICS
RFC 2819 Statistics function compliant with RMON 1 subset, each statistical information provided at 1 second intervals
ON BOARD SENSOR READINGS
Datasheet:
10GE Capture Cards: Silicom PB_fbC2CGg3hl Datasheet